/**
 @file sys_usw_dmps_mc_reg.h

 @author  Copyright (C) 2022 Centec Networks Inc.  All rights reserved.

 @date 2022-10-25

 @version v1.0

*/

#ifndef _SYS_USW_DMPS_MC_REG_H
#define _SYS_USW_DMPS_MC_REG_H
#ifdef __cplusplus
extern "C" {
#endif

/****************************************************************
 *
 * Header Files
 *
 ***************************************************************/
#include "sys_usw_dmps_reg.h"


extern int32
sys_usw_dmps_mcmac_reg_write_cal_ctrl(uint8 lchip, uint8 core_id, uint8 inst_id, 
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_credit_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_init(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_mac_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_mac_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_mii_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_mii_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_pause_rx_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_pause_tx_ctl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_pcs_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_rx_cal(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_rx_cal_bak(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_rx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_stats0_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_stats1_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_stats_init(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_stats_ram0(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_stats_ram1(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_tx_cal(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_tx_cal_bak(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_tx_chan_id_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_write_tx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);


extern int32
sys_usw_dmps_mcpcs_reg_write_800_en_clk(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_fec_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_pma_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_800_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_rx_chan_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_rx_fec_chan_map(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_rx_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_800_rx_phy_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_tx_chan_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_400_tx_fec_err_insert(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_write_800_tx_phy_lane_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);


extern int32
sys_usw_dmps_mchata_reg_write_enable(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mchata_reg_write_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mchata_reg_write_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mchata_reg_write_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mchata_reg_write_tx_phy_lane2chan_map(uint8 lchip, uint8 core_id, uint8 inst_id, uint8 entry_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);


extern int32
sys_usw_dmps_mcmac_reg_read_cal_ctrl(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_mac_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_mac_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_mii_rx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_mii_tx_cfg(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_stats_ram0(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_stats_ram1(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);

extern int32
sys_usw_dmps_mcmac_reg_read_mii_rx_debug_stats(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_pcs_debug_stats(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);


extern int32
sys_usw_dmps_mcpcs_reg_read_800_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_read_400_tx_fec_err_insert(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);

extern int32
sys_usw_dmps_mcpcs_reg_read_400_rx_chan_mon(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcpcs_reg_read_400_rx_lane_mon(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_rx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);
extern int32
sys_usw_dmps_mcmac_reg_read_tx_soft_rst(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);


#ifdef __cplusplus
}
#endif

#endif

